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| 1. general description the 74lvc1g66 provides one single pole, single-throw analog switch function. it has two input/output terminals (y and z) and an active hi gh enable input pin (e). when e is low, the analog switch is turned off. schmitt-trigger action at the enable input makes the circuit tolerant of slower input rise and fall times across the entire v cc range from 1.65 v to 5.5 v. 2. features and benefits ? wide supply voltage range from 1.65 v to 5.5 v ? very low on resistance: ? 7.5 ? (typical) at v cc =2.7v ? 6.5 ? (typical) at v cc =3.3v ? 6 ? (typical) at v cc =5v ? switch current ca pability of 32 ma ? high noise immunity ? cmos low power consumption ? ttl interface compatibility at 3.3 v ? latch-up performance meets requirements of jesd78 class i ? esd protection: ? hbm jesd22-a114f exceeds 2000 v ? mm jesd22-a115-a exceeds 200 v ? enable input accepts voltages up to 5.5 v ? multiple package options ? specified from ? 40 ? cto+85 ? c and ? 40 ? cto+125 ? c 3. ordering information 74lvc1g66 bilateral switch rev. 8 ? 2 december 2011 product data sheet table 1. ordering information type number package temperature range name description version 74lvc1g66gw ? 40 ? c to +125 ? c tssop5 plastic thin shrink small outline package; 5 leads; body width 1.25 mm sot353-1 74lvc1g66gv ? 40 ? c to +125 ? c sc-74a plastic surface-mounted package; 5 leads sot753 74lvc1g66gm ? 40 ? c to +125 ? c xson6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 ? 1.45 ? 0.5 mm sot886
74lvc1g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 2 december 2011 2 of 25 nxp semiconductors 74lvc1g66 bilateral switch 4. marking [1] the pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. functional diagram 74lvc1g66gf ? 40 ? c to +125 ? c xson6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 ? 1 ? 0.5 mm sot891 74lvc1g66gn ? 40 ? c to +125 ? c xson6 extremely thin small outline package; no leads; 6 terminals; body 0.9 ? 1.0 ? 0.35 mm sot1115 74LVC1G66GS ? 40 ? c to +125 ? c xson6 extremely thin small outline package; no leads; 6 terminals; body 1.0 ? 1.0 ? 0.35 mm sot1202 table 1. ordering information ?continued type number package temperature range name description version table 2. marking type number marking code [1] 74lvc1g66gw vl 74lvc1g66gv v66 74lvc1g66gm vl 74lvc1g66gf vl 74lvc1g66gn vl 74LVC1G66GS vl fig 1. logic symbol fig 2. iec logic symbol 001aag487 e zy mna076 4 # 1 2 x1 1 1 fig 3. logic diagram 001aam397 v cc e y z 74lvc1g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 2 december 2011 3 of 25 nxp semiconductors 74lvc1g66 bilateral switch 6. pinning information 6.1 pinning 6.2 pin description 7. functional description [1] h = high voltage level; l = low voltage level fig 4. pin configuration sot353-1 and sot753 fig 5. pin configuration sot886 fig 6. pin configuration sot891 and sot1115 and sot1202 74lvc1g66 yv cc z gnd e 001aad654 1 2 3 5 4 74lvc1g66 z 001aag498 y gnd n.c. v cc e transparent top view 2 3 1 5 4 6 74lvc1g66 z 001aag499 y gnd n.c. v cc e transparent top view 2 3 1 5 4 6 table 3. pin description symbol pin description sot353-1, sot753 sot886, sot891, sot1115 and sot1202 y 1 1 independent input or output z 2 2 independent output or input gnd 3 3 ground (0 v) e 4 4 enable input (active high) n.c. - 5 not connected v cc 5 6 supply voltage table 4. function table [1] input e switch loff-state h on-state 74lvc1g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 2 december 2011 4 of 25 nxp semiconductors 74lvc1g66 bilateral switch 8. limiting values [1] the minimum input voltage rating may be exceeded if the input current rating is observed. [2] the minimum and maximum switch voltage ratings may be e xceeded if the switch clamping current rating is observed. [3] for tssop5 and sc-74a packages: above 87.5 ? c the value of p tot derates linearly with 4.0 mw/k. for xson6 packages: above 118 ? c the value of p tot derates linearly with 7.8 mw/k. 9. recommended operating conditions [1] to avoid sinking gnd current from terminal z when switch current flows in terminal y, the voltage drop across the bidirectio nal switch must not exceed 0.4 v. if the switch current flows into terminal z, no gnd current will flow from te rminal y. in this case, there is no limit for the voltage drop across the switch. [2] applies to control signal levels. table 5. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit v cc supply voltage ? 0.5 +6.5 v v i input voltage [1] ? 0.5 +6.5 v i ik input clamping current v i < ? 0.5 v or v i >v cc +0.5v ? 50 - ma i sk switch clamping current v i < ? 0.5 v or v i >v cc +0.5v - ? 50 ma v sw switch voltage enable and disable mode [2] ? 0.5 v cc +0.5 v i sw switch current v sw > ? 0.5 v or v sw 74lvc1g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 2 december 2011 6 of 25 nxp semiconductors 74lvc1g66 bilateral switch 10.1 test circuits 10.2 on resistance v i = v cc or gnd and v o = gnd or v cc .v i = v cc or gnd and v o = open circuit. fig 7. test circuit for measuring off-state leakage current fig 8. test circuit for measuring on-state leakage current 001aam389 i s v i v il v o v cc gnd y z e 001aam390 i s v i v ih v o v cc gnd y z e table 8. on resistance at recommended operating conditions; voltages ar e referenced to gnd (ground 0 v); for graphs see figure 10 to figure 15 . symbol parameter conditions ? 40 ? c to +85 ?c ? 40 ? c to +125 ?c unit min typ [1] max min max r on(peak) on resistance (peak) v i =gndtov cc ; see figure 9 i sw =4ma; v cc = 1.65 v to 1.95 v - 34.0 130 - 195 ? i sw =8ma; v cc = 2.3 v to 2.7 v - 12.0 30 - 45 ? i sw =12ma; v cc =2.7v - 10.4 25 - 38 ? i sw =24ma; v cc = 3.0 v to 3.6 v - 7.8 20 - 30 ? i sw =32ma; v cc = 4.5 v to 5.5 v - 6.2 15 - 23 ? r on(rail) on resistance (rail) v i = gnd; see figure 9 i sw =4ma; v cc = 1.65 v to 1.95 v -8.218 - 27 ? i sw =8ma; v cc = 2.3 v to 2.7 v - 7.1 16 - 24 ? i sw =12ma; v cc = 2.7 v - 6.9 14 - 21 ? i sw =24ma; v cc = 3.0 v to 3.6 v - 6.5 12 - 18 ? i sw =32ma; v cc = 4.5 v to 5.5 v - 5.8 10 - 15 ? v i =v cc ; see figure 9 i sw =4ma; v cc = 1.65 v to 1.95 v - 10.4 30 - 45 ? i sw =8ma; v cc = 2.3 v to 2.7 v - 7.6 20 - 30 ? i sw =12ma; v cc = 2.7 v - 7.0 18 - 27 ? i sw =24ma; v cc = 3.0 v to 3.6 v - 6.1 15 - 23 ? i sw =32ma; v cc = 4.5 v to 5.5 v - 4.9 10 - 15 ? 74lvc1g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 2 december 2011 7 of 25 nxp semiconductors 74lvc1g66 bilateral switch [1] typical values are measured at t amb = 25 ? c and nominal v cc . [2] flatness is defined as the difference between the maximum and minimum value of on resistance measured at identical v cc and temperature. 10.3 on resistance test circuit and graphs r on(flat) on resistance (flatness) v i =gndtov cc [2] i sw =4ma; v cc = 1.65 v to 1.95 v -26.0- - - ? i sw =8ma; v cc = 2.3 v to 2.7 v - 5.0 - - - ? i sw =12ma; v cc =2.7v - 3.5 - - - ? i sw =24ma; v cc = 3.0 v to 3.6 v - 2.0 - - - ? i sw =32ma; v cc = 4.5 v to 5.5 v - 1.5 - - - ? table 8. on resistance ?continued at recommended operating conditions; voltages ar e referenced to gnd (ground 0 v); for graphs see figure 10 to figure 15 . symbol parameter conditions ? 40 ? c to +85 ?c ? 40 ? c to +125 ?c unit min typ [1] max min max r on =v sw /i sw .( 1 ) v cc = 1.8 v. (2) v cc = 2.5 v. (3) v cc = 2.7 v. (4) v cc = 3.3 v. (5) v cc = 5.0 v. fig 9. test circuit for measuring on resistance fig 10. typical on resistance as a function of input voltage; t amb = 25 ?c 001aam391 v i v ih v cc gnd z y e v sw i sw v i (v) 05 4 23 1 mna673 20 10 30 40 r on () 0 (1) (2) (3) (4) (5) 74lvc1g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 2 december 2011 8 of 25 nxp semiconductors 74lvc1g66 bilateral switch (1) t amb = 125 ? c. (2) t amb =85 ? c. (3) t amb =25 ? c. (4) t amb = ?40 ? c. (1) t amb = 125 ? c. (2) t amb =85 ? c. (3) t amb =25 ? c. (4) t amb = ?40 ? c. fig 11. on resistance as a function of input voltage; v cc =1.8v fig 12. on resistance as a function of input voltage; v cc =2.5v v i (v) 0 2.0 1.6 0.8 1.2 0.4 001aaa712 25 35 15 45 55 r on () 5 (4) (3) (2) (1) v i (v) 0 2.5 2.0 1.0 1.5 0.5 001aaa708 9 11 7 13 15 r on () 5 (1) (2) (3) (4) (1) t amb = 125 ? c. (2) t amb =85 ? c. (3) t amb =25 ? c. (4) t amb = ?40 ? c. (1) t amb = 125 ? c. (2) t amb =85 ? c. (3) t amb =25 ? c. (4) t amb = ?40 ? c. fig 13. on resistance as a function of input voltage; v cc =2.7v fig 14. on resistance as a function of input voltage; v cc =3.3v 001aaa709 v i (v) 0 3.0 2.0 1.0 2.5 1.5 0.5 9 7 11 13 r on () 5 (1) (2) (3) (4) v i (v) 04 3 12 001aaa710 6 8 10 r on () 4 (1) (2) (3) (4) 74lvc1g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 2 december 2011 9 of 25 nxp semiconductors 74lvc1g66 bilateral switch 11. dynamic characteristics (1) t amb = 125 ? c. (2) t amb =85 ? c. (3) t amb =25 ? c. (4) t amb = ?40 ? c. fig 15. on resistance as a function of input voltage; v cc =5.0v v i (v) 05 4 23 1 001aaa711 5 4 6 7 r on () 3 (2) (4) (1) (3) table 9. dynamic characteristics at recommended operating conditions; voltages are re ferenced to gnd (ground = 0 v); for test circuit see figure 18 . symbol parameter conditions ? 40 ? c to +85 ? c ? 40 ? c to +125 ?c unit min typ [1] max min max t pd propagation delay y to z or z to y; see figure 16 [2] [3] v cc = 1.65 v to 1.95 v - 0.8 2.0 - 3.0 ns v cc = 2.3 v to 2.7 v - 0.4 1.2 - 2.0 ns v cc = 2.7 v - 0.4 1.0 - 1.5 ns v cc = 3.0 v to 3.6 v - 0.3 0.8 - 1.5 ns v cc = 4.5 v to 5.5 v - 0.2 0.6 - 1.0 ns t en enable time e to y or z; see figure 17 [4] v cc = 1.65 v to 1.95 v 1.0 5.3 12 1.0 15.5 ns v cc = 2.3 v to 2.7 v 1.0 3.0 6.5 1.0 8.5 ns v cc = 2.7 v 1.0 2.6 6.0 1.0 8.0 ns v cc = 3.0 v to 3.6 v 1.0 2.5 5.0 1.0 6.5 ns v cc = 4.5 v to 5.5 v 1.0 1.9 4.2 1.0 5.5 ns 74lvc1g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 2 december 2011 10 of 25 nxp semiconductors 74lvc1g66 bilateral switch [1] typical values are measured at t amb =25 ? c and nominal v cc . [2] t pd is the same as t plh and t phl [3] propagation delay is the calculated rc ti me constant of the typical on resistance of the switch and the specified capacitanc e when driven by an ideal voltage source (zero output impedance). [4] t en is the same as t pzh and t pzl [5] t dis is the same as t plz and t phz [6] c pd is used to determine the dynamic power dissipation (p d in ? w). p d =c pd ? v cc 2 ? f i ? n+ ? {(c l +c s(on) ) ? v cc 2 ? f o } where: f i = input frequency in mhz; f o = output frequency in mhz; c l = output load capacitance in pf; c s(on) = maximum on-state switch capacitance in pf; v cc = supply voltage in v; n = number of inputs switching; ? {(c l +c s(on) ) ? v cc 2 ? f o } = sum of the outputs. 11.1 waveforms and test circuit t dis disable time e to y or z; see figure 17 [5] v cc = 1.65 v to 1.95 v 1.0 4.2 10 1.0 13 ns v cc = 2.3 v to 2.7 v 1.0 2.4 6.9 1.0 9.0 ns v cc = 2.7 v 1.0 3.6 7.5 1.0 9.5 ns v cc = 3.0 v to 3.6 v 1.0 3.4 6.5 1.0 8.5 ns v cc = 4.5 v to 5.5 v 1.0 2.5 5.0 1.0 6.5 ns c pd power dissipation capacitance c l =50pf; f i =10mhz; v i =gndtov cc [6] v cc =2.5v - 9.8 - - - pf v cc =3.3v - 12.0 - - - pf v cc =5.0v - 17.3 - - - pf table 9. dynamic characteristics ?continued at recommended operating conditions; voltages are re ferenced to gnd (ground = 0 v); for test circuit see figure 18 . symbol parameter conditions ? 40 ? c to +85 ? c ? 40 ? c to +125 ?c unit min typ [1] max min max measurement points are given in table 10 . logic levels: v ol and v oh are typical output voltage levels that occur with the output load. fig 16. input (y or z) to output (z or y) propagation delays mna667 t plh t phl v m v m y or z input z or y output gnd v i v oh v ol 74lvc1g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 2 december 2011 11 of 25 nxp semiconductors 74lvc1g66 bilateral switch measurement points are given in table 10 . logic levels: v ol and v oh are typical output voltage levels that occur with the output load. fig 17. enable and disable times mna668 t plz t phz switch disabled switch enabled v y v x switch enabled output low-to-off off-to-low output high-to-off off-to-high e y or z y or z v i v ol v oh v cc v m gnd gnd t pzl t pzh v m v m table 10. measurement points supply voltage input output v cc v m v m v x v y 1.65 v to 1.95 v 0.5v cc 0.5v cc v ol + 0.15 v v oh ? 0.15 v 2.3 v to 2.7 v 0.5v cc 0.5v cc v ol + 0.15 v v oh ? 0.15 v 2.7v 1.5v 1.5v v ol + 0.3 v v oh ? 0.3 v 3.0vto3.6v 1.5v 1.5 v v ol + 0.3 v v oh ? 0.3 v 4.5 v to 5.5 v 0.5v cc 0.5v cc v ol + 0.3 v v oh ? 0.3 v 74lvc1g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 2 december 2011 12 of 25 nxp semiconductors 74lvc1g66 bilateral switch 11.2 additional dynami c characteristics test data is given in table 11 . definitions for test circuit: r t = termination resistance should be equal to output impedance z o of the pulse generator. c l = load capacitance including jig and probe capacitance. r l = load resistance. v ext = external voltage for measuring switching times. fig 18. test circuit for measuring switching times v ext v cc v i v o mna616 dut c l r t r l r l g table 11. test data supply voltage input load v ext v cc v i t r , t f c l r l t plh , t phl t pzh , t phz t pzl , t plz 1.65 v to 1.95 v v cc ? 2.0ns 30pf 1k ? open gnd 2v cc 2.3 v to 2.7 v v cc ? 2.0ns 30pf 500 ? open gnd 2v cc 2.7 v 2.7 v ? 2.5ns 50pf 500 ? open gnd 6 v 3.0 v to 3.6 v 2.7 v ? 2.5ns 50pf 500 ? open gnd 6 v 4.5 v to 5.5 v v cc ? 2.5ns 50pf 500 ? open gnd 2v cc table 12. additional dynamic characteristics at recommended operating conditions; voltag es are referenced to gnd (ground = 0 v); t amb =25 ? c. symbol parameter conditions min typ max unit thd total harmonic distortion r l =10k ? ; c l =50pf; f i = 1 khz; see figure 19 v cc =1.65v - 0.032 - % v cc = 2.3 v - 0.008 - % v cc = 3.0 v - 0.006 - % v cc = 4.5 v - 0.001 - % r l =10k ? ; c l =50pf; f i =10khz; see figure 19 v cc =1.65v - 0.068 - % v cc = 2.3 v - 0.009 - % v cc = 3.0 v - 0.008 - % v cc = 4.5 v - 0.006 - % 74lvc1g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 2 december 2011 13 of 25 nxp semiconductors 74lvc1g66 bilateral switch f ( ? 3db) ? 3 db frequency response r l =600 ? ; c l =50pf; see figure 20 v cc =1.65v - 135 - mhz v cc =2.3v - 145 - mhz v cc =3.0v - 150 - mhz v cc =4.5v - 155 - mhz r l =50 ? ; c l = 5 pf; see figure 20 v cc =1.65v - ? 500 - mhz v cc =2.3v - ? 500 - mhz v cc =3.0v - ? 500 - mhz v cc =4.5v - ? 500 - mhz r l =50 ? ; c l = 10 pf; see figure 20 v cc =1.65v - 200 - mhz v cc =2.3v - 350 - mhz v cc =3.0v - 410 - mhz v cc =4.5v - 440 - mhz ? iso isolation (off-state) r l =600 ? ; c l =50pf; f i = 1 mhz; see figure 21 v cc =1.65v - ? 46 - db v cc =2.3v - ? 46 - db v cc =3.0v - ? 46 - db v cc =4.5v - ? 46 - db r l =50 ? ; c l =5pf; f i =1mhz; see figure 21 v cc =1.65v - ? 37 - db v cc =2.3v - ? 37 - db v cc =3.0v - ? 37 - db v cc =4.5v - ? 37 - db v ct crosstalk voltage between digital input and switch; r l =600 ? ; c l =50pf; f i = 1 mhz; t r =t f = 2 ns; see figure 22 v cc =1.65v - 69 - mv v cc =2.3v - 87 - mv v cc =3.0v - 156 - mv v cc =4.5v - 302 - mv table 12. additional dynamic characteristics ?continued at recommended operating conditions; voltag es are referenced to gnd (ground = 0 v); t amb =25 ? c. symbol parameter conditions min typ max unit 74lvc1g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 2 december 2011 14 of 25 nxp semiconductors 74lvc1g66 bilateral switch 11.3 test circuits q inj charge injection c l = 0.1 nf; v gen =0v; r gen =0 ? ; f i = 1 mhz; r l =1 m ? ; see figure 23 v cc = 1.8 v - 3.3 - pc v cc = 2.5 v - 4.1 - pc v cc = 3.3 v - 5.0 - pc v cc = 4.5 v - 6.4 - pc v cc = 5.5 v - 7.5 - pc table 12. additional dynamic characteristics ?continued at recommended operating conditions; voltag es are referenced to gnd (ground = 0 v); t amb =25 ? c. symbol parameter conditions min typ max unit test conditions: v cc = 1.65 v: v i = 1.4 v (p-p). v cc = 2.3 v: v i = 2 v (p-p). v cc = 3 v: v i = 2.5 v (p-p). v cc = 4.5 v: v i = 4 v (p-p). fig 19. test circuit for measuri ng total harmonic distortion 001aam392 v ih v o v cc 0.5v cc z/y y/z e 600 f i r l 10 f c l d adjust f i voltage to obtain 0 dbm level at output. increase f i frequency until db meter reads ? 3db. fig 20. test circuit for measuring the frequency response when switch is in on-state 001aam393 v ih v o v cc 0.5v cc z/y y/z e 50 f i r l 0.1 f c l db 74lvc1g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 2 december 2011 15 of 25 nxp semiconductors 74lvc1g66 bilateral switch adjust f i voltage to obtain 0 dbm level at input. fig 21. test circuit for measuring isolation (off-state) 001aam394 v il v o v cc 0.5v cc z/y y/z e 50 f i r l 0.5v cc r l 0.1 f c l db fig 22. test circuit for measuring cros stalk between digita l input and switch 001aam395 v o v cc 0.5v cc z/y y/z e 50 600 logic input r l 0.5v cc c l g q inj = ? v o ? c l . ? v o = output voltage variation. r gen = generator resistance. v gen = generator voltage. fig 23. test circuit for measuring charge injection 001aam396 v o v cc z/y y/z e logic input r l 1 m r gen c l 0.1 nf v gen g 001aam398 on off logic input (e) v o off v o 74lvc1g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 2 december 2011 16 of 25 nxp semiconductors 74lvc1g66 bilateral switch 12. package outline fig 24. package outline sot353-1 (tssop5) unit a 1 a max. a 2 a 3 b p lh e l p wy v ce d (1) e (1) z (1) references outline version european projection issue date iec jedec jeita mm 0.1 0 1.0 0.8 0.30 0.15 0.25 0.08 2.25 1.85 1.35 1.15 0.65 e 1 1.3 2.25 2.0 0.60 0.15 7 0 0.1 0.1 0.3 0.425 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 0.46 0.21 sot353-1 mo-203 sc-88a 00-09-01 03-02-19 w m b p d z e e 1 0.15 13 5 4 a a 2 a 1 l p (a 3 ) detail x l h e e c v m a x a y 1.5 3 mm 0 scale tssop5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm sot353-1 1.1 74lvc1g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 2 december 2011 17 of 25 nxp semiconductors 74lvc1g66 bilateral switch fig 25. package outline sot753 (sc-74a) references outline version european projection issue date iec jedec jeita sot753 sc-74a wb m b p d e a a 1 l p q detail x h e e v m a a b y 0 1 2 mm scale c x 13 2 4 5 plastic surface-mounted package; 5 leads sot753 unit a 1 b p cd e h e l p qy wv mm 0.100 0.013 0.40 0.25 3.1 2.7 0.26 0.10 1.7 1.3 e 0.95 3.0 2.5 0.2 0.1 0.2 dimensions (mm are the original dimensions) 0.6 0.2 0.33 0.23 a 1.1 0.9 02-04-16 06-03-16 74lvc1g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 2 december 2011 18 of 25 nxp semiconductors 74lvc1g66 bilateral switch fig 26. package outline sot886 (xson6) terminal 1 index area references outline version european projection issue date iec jedec jeita sot886 mo-252 sot886 04-07-15 04-07-22 dimensions (mm are the original dimensions) xson6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm d e e 1 e a 1 b l l 1 e 1 0 1 2 mm scale notes 1. including plating thickness. 2. can be visible in some manufacturing processes. unit mm 0.25 0.17 1.5 1.4 0.35 0.27 a 1 max b e 1.05 0.95 d ee 1 l 0.40 0.32 l 1 0.50.6 a (1) max 0.5 0.04 1 6 2 5 3 4 6 (2) 4 (2) a 74lvc1g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 2 december 2011 19 of 25 nxp semiconductors 74lvc1g66 bilateral switch fig 27. package outline sot891 (xson6) terminal 1 index area references outline version european projection issue date iec jedec jeita sot891 sot891 05-04-06 07-05-15 xson6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1 x 0.5 mm d e e 1 e a 1 b l l 1 e 1 0 1 2 mm scale dimensions (mm are the original dimensions) unit mm 0.20 0.12 1.05 0.95 0.35 0.27 a 1 max b e 1.05 0.95 d ee 1 l 0.40 0.32 l 1 0.35 0.55 a max 0.5 0.04 1 6 2 5 3 4 a 6 (1) 4 (1) note 1. can be visible in some manufacturing processes. 74lvc1g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 2 december 2011 20 of 25 nxp semiconductors 74lvc1g66 bilateral switch fig 28. package outline sot1115 (xson6) references outline version european projection issue date iec jedec jeita sot1115 sot1115_po 10-04-02 10-04-07 unit mm max nom min 0.35 0.04 0.95 0.90 0.85 1.05 1.00 0.95 0.55 0.3 0.40 0.35 0.32 a (1) dimensions note 1. including plating thickness. 2. visible depending upon used manufacturing technology. xson6: extremely thin small outline package; no leads; 6 terminals; body 0.9 x 1.0 x 0.35 mm sot1115 a 1 b 0.20 0.15 0.12 deee 1 l 0.35 0.30 0.27 l 1 0 0.5 1 mm scale terminal 1 index area d e (4) (2) e 1 e 1 e l l 1 b 321 6 5 4 (6) (2) a 1 a 74lvc1g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 2 december 2011 21 of 25 nxp semiconductors 74lvc1g66 bilateral switch fig 29. package outline sot1202 (xson6) references outline version european projection issue date iec jedec jeita sot1202 sot1202_po 10-04-02 10-04-06 unit mm max nom min 0.35 0.04 1.05 1.00 0.95 1.05 1.00 0.95 0.55 0.35 0.40 0.35 0.32 a (1) dimensions note 1. including plating thickness. 2. visible depending upon used manufacturing technology. xson6: extremely thin small outline package; no leads; 6 terminals; body 1.0 x 1.0 x 0.35 mm sot1202 a 1 b 0.20 0.15 0.12 deee 1 l 0.35 0.30 0.27 l 1 0 0.5 1 mm scale terminal 1 index area d e (4) (2) e 1 e 1 e l b 123 l 1 6 5 4 (6) (2) a a 1 74lvc1g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 2 december 2011 22 of 25 nxp semiconductors 74lvc1g66 bilateral switch 13. abbreviations 14. revision history table 13. abbreviations acronym description cmos complementary metal oxide semiconductor ttl transistor-transistor logic hbm human body model esd electrostatic discharge mm machine model dut device under test table 14. revision history document id release date data sheet status change notice supersedes 74lvc1g66 v.8 20111202 product data sheet - 74lvc1g66 v.7 modifications: ? legal pages updated. 74lvc1g66 v.7 20100730 product data sheet - 74lvc1g66 v.6 74lvc1g66 v.6 20070827 product data sheet - 74lvc1g66 v.5 74lvc1g66 v.5 20070807 product data sheet - 74lvc1g66 v.4 74lvc1g66 v.4 20040413 product specification - 74lvc1g66 v.3 74lvc1g66 v.3 20021115 product specification - 74lvc1g66 v.2 74lvc1g66 v.2 20020529 product specification - 74lvc1g66 v.1 74lvc1g66 v.1 20011030 product specification - - 74lvc1g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 2 december 2011 23 of 25 nxp semiconductors 74lvc1g66 bilateral switch 15. legal information 15.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 15.2 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. product specification ? the information and data provided in a product data sheet shall define the specification of the product as agreed between nxp semiconductors and its customer , unless nxp semiconductors and customer have explicitly agreed otherwis e in writing. in no event however, shall an agreement be valid in which the nxp semiconductors product is deemed to offer functions and qualities beyond those described in the product data sheet. 15.3 disclaimers limited warranty and liability ? information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. in no event shall nxp semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. notwithstanding any damages that customer might incur for any reason whatsoever, nxp semiconductors? aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the terms and conditions of commercial sale of nxp semiconductors. right to make changes ? nxp semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use ? nxp semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer?s own risk. applications ? applications that are described herein for any of these products are for illustrative purpos es only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. customers are responsible for the design and operation of their applications and products using nxp semiconductors products, and nxp semiconductors accepts no liability for any assistance with applications or customer product design. it is customer?s sole responsibility to determine whether the nxp semiconductors product is suitable and fit for the customer?s applications and products planned, as well as fo r the planned application and use of customer?s third party customer(s). customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. nxp semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer?s applications or products, or the application or use by customer?s third party customer(s). customer is responsible for doing all necessary testing for the customer?s applic ations and products using nxp semiconductors products in order to av oid a default of the applications and the products or of the application or use by customer?s third party customer(s). nxp does not accept any liability in this respect. limiting values ? stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the gener al terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconducto rs products by customer. no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any lic ense under any copyrights, patents or other industrial or intellectual property rights. export control ? this document as well as the item(s) described herein may be subject to export control regulations. export might require a prior authorization from competent authorities. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this document contains the product specification. 74lvc1g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 8 ? 2 december 2011 24 of 25 nxp semiconductors 74lvc1g66 bilateral switch non-automotive qualified products ? unless this data sheet expressly states that this specific nxp semicon ductors product is automotive qualified, the product is not suitable for automotive use. it is neither qualified nor tested in accordance with automotive testing or application requirements. nxp semiconductors accepts no liabili ty for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. in the event that customer uses t he product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without nxp semiconductors? warranty of the product for such automotive applicat ions, use and specifications, and (b) whenever customer uses the product for automotive applications beyond nxp semiconductors? specifications such use shall be solely at customer?s own risk, and (c) customer fully indemnifies nxp semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive app lications beyond nxp semiconductors? standard warranty and nxp semiconduct ors? product specifications. 15.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. 16. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com nxp semiconductors 74lvc1g66 bilateral switch ? nxp b.v. 2011. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 2 december 2011 document identifier: 74lvc1g66 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 17. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 functional description . . . . . . . . . . . . . . . . . . . 3 8 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 9 recommended operating conditions. . . . . . . . 4 10 static characteristics. . . . . . . . . . . . . . . . . . . . . 5 10.1 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 10.2 on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . 6 10.3 on resistance test circuit and graphs. . . . . . . . 7 11 dynamic characteristics . . . . . . . . . . . . . . . . . . 9 11.1 waveforms and test circuit . . . . . . . . . . . . . . . 10 11.2 additional dynamic characteristics . . . . . . . . . 12 11.3 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 12 package outline . . . . . . . . . . . . . . . . . . . . . . . . 16 13 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 22 14 revision history . . . . . . . . . . . . . . . . . . . . . . . . 22 15 legal information. . . . . . . . . . . . . . . . . . . . . . . 23 15.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 23 15.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 15.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 15.4 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 24 16 contact information. . . . . . . . . . . . . . . . . . . . . 24 17 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 |
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